Technical Details
AMD announced the start of mass production of next-generation server processors codenamed Venice (6th generation EPYC chips on Zen 6 architecture). This is the first high-performance computing chip (HPC) in the semiconductor industry to transition to the advanced 2-nanometer process (N2) from TSMC.
Background and Context
Initially, production will take place at TSMC factories in Taiwan, but AMD plans to utilize factories in Arizona, USA, to ensure geographical diversification of supplies.
Industry Impact
The transition to the N2 process marks a fundamental architectural shift: TSMC is abandoning FinFET transistors in favor of GAA nanosheet transistors, which provide maximum control over current.
